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IRFPS35N50LPBF smps mosfet hexfet power mosfet 09/14/04 super-247? v dss r ds(on) typ. trr typ. i d 500v 0.125 ? 170ns 34a features and benefits ?

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? ( absolute maximum ratings parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 34 i d @ t c = 100c continuous drain current, v gs @ 10v 22 a i dm pulsed drain current 140 p d @t c = 25c power dissipation 450 w linear derating factor 3.6 w/c v gs gate-to-source voltage 30 v dv/dt peak diode recovery dv/dt 15 v/ns t j operating junction and -55 to + 150 t stg storage temperature range c soldering temperature, for 10 seconds 300 (1.6mm from case ) mounting torque, 6-32 or m3 screw 1.1(10) nm (lbfin) diode characteristics symbol parameter min. typ. max. units conditions i s continuous source current ??? ??? 34 mosfet symbol (body diode) a showing the i sm pulsed source current ??? ??? 140 integral reverse (body diode) p-n junction diode. v sd diode forward voltage ??? ??? 1.5 v t j = 25c, i s = 34a, v gs = 0v t rr reverse recovery time ??? 170 250 ns t j = 25c, i f = 34a ??? 220 330 t j = 125c, di/dt = 100a/s q rr reverse recovery charge ??? 670 1010 nc t j = 25c, i s = 34a, v gs = 0v ??? 1500 2200 t j = 125c, di/dt = 100a/s i rrm reverse recovery current ??? 8.5 ??? a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld ) pd- 95140 www.vishay.com 1 document number: 91257

repetitive rating; pulse width limited by max. junction temperature. (see fig. 11) starting t j = 25c, l = 0.97mh, r g =25 ? , i as = 34a (see figure 13) pulse width 400s; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss. c oss eff.(er) is a fixed capacitance that stores the same energy as c oss while v ds is rising from 0 to 80% v dss . i sd 34a, di/dt 765a/s, v dd v (br)dss , t j 150c.
static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 500 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.12 ??? v/c r ds(on) static drain-to-source on-resistance ??? 0.125 0.145 ? v gs(th) gate threshold voltage 3.0 ??? 5.0 v i dss drain-to-source leakage current ??? ??? 50 a ??? ??? 2.0 ma i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 r g internal gate resistance ??? 1.1 ??? ? gfs forward transconductance 18 ??? ??? s q g total gate charge ??? ??? 230 q gs gate-to-source charge ??? ??? 65 nc q gd gate-to-drain ("miller") charge ??? ??? 110 t d(on) turn-on delay time ??? 24 ??? t r rise time ??? 100 ??? ns t d(off) turn-off delay time ??? 42 ??? t f fall time ???42??? c iss input capacitance ??? 5580 ??? c oss output capacitance ??? 590 ??? c rss reverse transfer capacitance ??? 58 ??? pf c oss output capacitance ??? 7290 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 160 ??? v gs = 0v, v ds = 400v, ? = 1.0mhz c oss eff. effective output capacitance ??? 320 ??? c oss eff. (er) effective output capacitance ??? 220 ??? (energy related) avalanche characteristics symbol parameter typ. units e as single pulse avalanche energy ??? mj i ar avalanche current ??? a e ar repetitive avalanche energy ??? mj thermal resistance symbol parameter typ. units r jc junction-to-case ??? r cs case-to-sink, flat, greased surface 0.24 c/w r ja junction-to-ambient ??? v ds = v gs , i d = 250a v ds = 500v, v gs = 0v v ds = 400v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 20a v gs = 30v f = 1mhz, open drain conditions v ds = 50v, i d = 20a v gs = -30v i d = 34a v ds = 400v v gs = 10v, see fig. 7 & 15 v dd = 250v i d = 34a r g = 1.2 ? v gs = 10v, see fig. 10a & 10b v gs = 0v v ds = 25v 34 45 max. 560 v gs = 0v,v ds = 0v to 400v ? = 1.0mhz, see fig. 5 40 max. 0.28 ??? www.vishay.com 2 document number: 91257

fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 0.1 1 10 100 1000 0.1 1 10 100 20s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.01 0.1 1 10 100 1000 4.0 5.0 6.0 7.0 8.0 9.0 10.0 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 150 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 34a 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.001 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 20s pulse width tj = 25c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v www.vishay.com 3 document number: 91257

fig 5. typical capacitance vs. drain-to-source voltage fig 8. typical source-drain diode forward voltage 0.1 1 10 100 1000 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 150 c j 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd fig 6. typ. output capacitance stored energy vs. v ds fig 7. typical gate charge vs. gate-to-source voltage 0 40 80 120 160 200 240 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 34a v = 100v ds v = 250v ds v = 400v ds 0 100 200 300 400 500 600 v ds, drain-to-source voltage (v) 0 5 10 15 20 25 30 e n e r g y ( j ) www.vishay.com 4 document number: 91257

fig 10a. switching time test circuit v ds 9 0% 1 0% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms
1 0.1 % + - fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 0 5 10 15 20 25 30 35 t , case temperature ( c) i , drain current (a) c d www.vishay.com 5 document number: 91257

fig 13. maximum avalanche energy vs. drain current 25 50 75 100 125 150 0 200 400 600 800 1000 1200 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 15a 22a 34a fig 14b. unclamped inductive waveforms t p v (br)dss i as fig 14a. unclamped inductive test circuit r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v q g q gs q gd v g charge d.u.t. v d s i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 15a. gate charge test circuit fig 15b. basic gate charge waveform fig 12. maximum safe operating area 1 10 100 1000 1 10 100 1000 1000 0 operation in this area limited by r ds(on) single pulse t t = 150 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms www.vishay.com 6 document number: 91257

p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop r e-applied v oltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - fig 14. for n-channel hexfet power mosfets
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data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 09/04 super to-247 ? package is not recommended for surface mount application. case outline and dimensions ? super-247 super-247 (to-274aa) part marking information assembly lot code top example: this is an irfps37n50a with assembly lot code 1789 international rectifier logo 89 irfps37n50a 17 part number assembled on ww 19, 1997 in the assembly line "c" note: "p" in assembly line position indicates "lead-free" 719c date code year 7 = 1997 week 19 line c www.vishay.com 8 document number: 91257
legal disclaimer notice vishay document number: 99901 www.vishay.com revision: 12-mar-07 1 notice the products described herein were acquired by vishay intertechnology, inc., as part of its acquisition of international rectifier?s power control systems (pcs) business, which closed in april 2007. specifications of the products displayed herein are pending review by vishay and are subject to the terms and conditions shown below. specifications of the products displayed herein are subject to change without notice. vishay intertechnology, inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. information contained herein is intended to provide a product description only. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. except as provided in vishay's terms and conditions of sale for such products, vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and /or use of vishay products including liab ility or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyrigh t, or other intellectual property right. the products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify vishay for any damages resulting from such improper use or sale. international rectifier ? , ir ? , the ir logo, hexfet ? , hexsense ? , hexdip ? , dol ? , intero ? , and powirtrain ? are registered trademarks of international rectifier corporation in the u.s. and other countries. all other product names noted herein may be trademarks of their respective owners.

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